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US007839169B2

(12;

United States Patent

Murotake

(io) Patent No.: (45) Date of Patent:

US 7,839,169 B2 Nov. 23, 2010

(54) PROGRAMMABLE LOGIC DEVICE WITH EMBEDDED SWITCH FABRIC

(75) Inventor: David K Murotake, Nashua, NH (US)

(73) Assignee: SCA Technica, Inc., Nashua, NH (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

(21) Appl.No.: 12/795,789

(22) Filed: Jun. 8, 2010

(65) Prior Publication Data

US 2010/0244896 Al Sep. 30, 2010

Related U.S. Application Data

(63) Continuation of application No. 12/177,175, filed on Jul. 22, 2008, now Pat. No. 7,733,125, which is a continuation of application No. 10/618,950, filed on Jul. 14, 2003, now Pat. No. 7,404,074.

(60) Provisional application No. 60/395,871, filed on Jul. 12, 2002.

(51) Int. CI.

H01L 25/00 (2006.01)
H03K19/173 (2006.01)

(52) U.S. CI 326/47; 326/41; 326/101

(58) Field of Classification Search None

See application file for complete search history.

(56) References Cited

U.S. PATENT DOCUMENTS

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The invention in the simplest form is a programmable logic device comprising logic blocks configured substantially in a plane, external I/O endpoints, and embedded switched fabrics which provide non-contentious connection between the logic blocks and between logic blocks and I/O endpoints, the switch fabrics being offset from the plane of the logic blocks. The logic blocks are organized into logic groups, whereby a plurality of primary embedded switch fabrics are configurable for connecting logic blocks within logic groups, and at least one secondary switch fabric provides non-contentious connection between primary switch fabrics. The switch fabrics can employ non-blocking crossbar switches. A hierarchy of secondary switch fabrics can be included for providing non-contentions connection between both primary and other secondary switch fabrics.

19 Claims, 12 Drawing Sheets

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Bernier, Steve and Latour, Capt. Hugues, "Software Communica-
tions Architecture Reference Implementation (SCARI) Project",
Software Defined Radio Forum, Jan. 29, 2002, pp. 1-43.
Xilinx, "Virtex-II Pro Platform FPGAs: Introduction and Overview",
DS083-1 (v2.0), Jun. 13, 2002, pp. 1-7.

Fewer, Colm, "Cross Bar Switch Implemented in FPGAs", Xilinx
WP166 (V1.0), Sep. 9, 2002, pp. 1-18.

Shah, Alok, "An Introduction to Software Radio", Vanu, Inc., 2002, pp. 1-5.

Schoeberl, Martin, "Using JOP at an Early Design Stage in a Real World Application", JOP Design, pp. 1-14.

Kohno et al., "Universal Platform for Software Defined Radio", pp. 1-4.

Murotake, David, "SDR Base Station Models—Multiprocessing", SDR Forum Document No. SDRF-00-T-0062-V0.0, Nov. 16, 2000, pp. 1-16.

Murotake, David, "JTRS SCA Platform Hardware Scalability", SDR
Forum Document No. SDRF-01, Nov. 13, 2001, pp. 1-16.
SDR Forum, SDR Primer, pp. 1-6.

Xilinx, "Software Designed Radio & 4G Development", pp. 1-67.
Murotake, David, "Use of Switched Fabrics in Implementation of
Software Defined Radio Smart Antenna and Interference Cancella-
tion Signal Processing", pp. 1-6.

* cited by examiner

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