In a method for scheduling instructions executed in a computer system including a processor and a memory subsystem, pipeline latencies and resource utilization are measured by sampling hardware while the instructions are executing. The instructions are then scheduled according to the measured latencies...http://www.google.com.hk/patents/US6092180?utm_source=gb-gplus-share專利 US6092180 - Method for measuring latencies by randomly selected sampling of the instructions while the instruction are executed
