A real-time processor debug system that selectively samples address and data signals of a virtual bus of a core processor during real-time operations to reduce power consumption and to minimize performance impact due to bus loading. Gating logic for an embedded processor provides the virtual bus signals...http://www.google.com.hk/patents/US6769076?utm_source=gb-gplus-share專利 US6769076 - Real-time processor debug system
