A method (and structure) for executing linear algebra subroutines, includes, for an execution code controlling operation of a floating point unit (FPU) performing the linear algebra subroutine execution, unrolling instructions to preload data into a floating point register (FReg) of the FPU. The unrolling...http://www.google.com.hk/patents/US7571435?utm_source=gb-gplus-share專利 US7571435 - Method and structure for producing high performance linear algebra routines using preloading of floating point registers
