A computer system includes a CPU and a memory device coupled through a North bridge logic device. The computer also includes a South bridge logic device coupled to the North bridge by a primary bus. The South bridge waits as long as possible before asserting a flush request (FLUSHREQ) control signal...http://www.google.com.hk/patents/US5991833?utm_source=gb-gplus-share專利 US5991833 - Computer system with bridge logic that reduces interference to CPU cycles during secondary bus transactions
