This invention deals with the formation of the multi-level electrode metal structure and the interconnecting inter-level metal studs used in the fabrication of VLSI circuits. After the metal layers have been formed the inter-level dielectric material used in forming the structure is etched away leaving...http://www.google.com.hk/patents/US5413962?utm_source=gb-gplus-share專利 US5413962 - Multi-level conductor process in VLSI fabrication utilizing an air bridge
