A method, apparatus, and computer program product for handling IEEE 754 standard exceptions for Single Instruction Multiple Data (SIMD) operations. Each SIMD sub-instruction's corresponding IEEE 754 exception flag is bit-wise "ORed" with an accrued exception field if a trap enable mask field is configured...http://www.google.com.hk/patents/US20030028759?utm_source=gb-gplus-share專利 US20030028759 - EXCEPTION HANDLING FOR SIMD FLOATING POINT-INSTRUCTIONS
