An access transistor arrangement is provided for a 6F2 stacked capacitor DRAM memory cell layout with shared bit line contacts. The access transistors are arranged in pairs along semiconductor lines. The two transistors of each pair of transistors are arranged laterally reversed opposing the respective...http://www.google.com.hk/patents/US20060281250?utm_source=gb-gplus-share專利 US20060281250 - 6F2 access transistor arrangement and semiconductor memory device
