A compiler system and method is provided that can 1) generate a second instruction stream from a first instruction stream, 2) read in and process predetermined external information regarding the basic blocks that makes up the second instruction stream and 3) place certain of the basic blocks on cache...http://www.google.com.hk/patents/US6301652?utm_source=gb-gplus-share專利 US6301652 - Instruction cache alignment mechanism for branch targets based on predicted execution frequencies
