CY74FCT162823CT. Parameter. Description. Condition[16]. Min. Max. Unit Fig.No.[16]. tPLH. tPHL. Propagation Delay. CLK to Q. CL=50 pF. RL=500Ω. 1.5. 6.0 ns. 1, ...

FCT-E speed at 4.4 ns. • Power-off disable outputs permits live insertion. • Edge-rate control circuitry for significantly improved noise characteristics.

CY74FCT162823CT. Parameter Description Condition[16] Min. Max. Unit Fig.No.[16]. tPLH. tPHL. Propagation Delay. CLK to Q CL=50 pF. RL=500Ω1.5 6.0 ns 1, 5.

The CY74FCT16823T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162823T has 24-mA balanced output drivers with ...

Aug 31, 2018 · CY74FCT162823CT. Parameter. Description. Condition[16]. Min. Max. Unit Fig.No.[16]. tPLH. tPHL. Propagation Delay. CLK to Q. CL=50 pF. RL=500Ω.

FCT-E speed at 4.4 ns. • Power-off disable outputs permits live insertion. • Edge-rate control circuitry for significantly improved noise characteristics.

CY74FCT162823CT | CY74FCT162823ET. Parameter. Description. Condition[16]. Min. Max. Min. Max. Unit Fig.No.[16]. tPLH. Propagation Delay. CL=50 pF. 1.5. 6.0. 1.5.

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CY74FCT162823T Features: Balanced 24 mA output drivers; Reduced system switching noise; Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C ...

54HC74 Dual D-type flip-flop made in 2.5µm 5V CMOS. Each flip-flop has separate data, set, reset, clock inputs & QQ\ outputs. D-Input level transfers to Q ...